A thin film transistor (TFT) in a flat display device, such as a liquid display device, an organic electroluminescence display device, or an inorganic electroluminescence display device, is used as a switching device for controlling operations of pixels, a driving device for driving the pixels, or as a complementary metal oxide semiconductor (CMOS) TFT.
The TFT includes a semiconductor active layer having a drain area, a source area doped with impurities of high concentration and a channel region formed between the drain area and the source area. A gate insulating layer is formed on the semiconductor active layer, and a gate electrode is formed on the gate insulating layer which is located on an upper part of the channel region of the active layer. The semiconductor active layer can be classified into an amorphous silicon and polycrystalline silicon according to crystallized status of the silicon.
The TFT using the amorphous silicon has an advantage in that a deposition can be performed at a low temperature. However, it also has disadvantages in that the electrical property and reliability of the TFT are degraded and it is difficult to make the display device a larger area. Thus, the polycrystalline silicon has been generally used only recently. The polycrystalline silicon has a higher mobility of tens of hundreds of cm2/V.s, and a low high frequency operation property and leakage current value, and thus may be suitable for use in the flat panel display with a high resolution and larger area.
On the other hand, the organic electroluminescence device has an emission layer made of an organic material between an anode electrode and a cathode electrode. In the organic electroluminescence device, when a positive voltage and a negative voltage are respectively applied to the electrodes, holes injected from the anode electrode are moved to the emission layer through a hole transport layer, and electrons are injected into the emission layer through an electron transport layer from the cathode electrode. The holes and electrons are recombined on the emission layer to produce exitons. The exitons are changed from an excited status to a ground status, causing phosphor molecules of the emission layer to radiate to form an image. In a full-color electroluminescence display, pixels radiating red (R), green (G), and blue (B) colors are disposed on the electroluminescence devices to realize the full colors.
However, luminous efficiencies of R, G, and B light emission layers are different from each other in the above organic electroluminescence device. Where the same currents are applied, a certain color has a low luminous brightness and a certain color has a high luminous brightness according to the luminous efficiencies. Therefore, it is difficult to obtain appropriate color balance and/or white balance. For example, the luminous efficiency of the G emission layer three to six times higher than that of the R emission layer and the B emission layer, and therefore, more electric currents are applied to the R and B emission layers to maintain the white balance.
In order to balance the white balance, Japanese Patent Laid-open Number hei 5-107561 discloses a method of applying different voltages, that is, Vdd values which are supplied through a driving line to pixels.
Also, Japanese Patent Laid-open No. 2001-109399 discloses a method of balancing the white balance by controlling a size of the driving TFT. That is, when a channel width of the channel region of the driving TFT is W and a length of the channel is L, W/L rates of R, G, and B pixels are set to be different to control the amount of current flowing in the R, G, and B electroluminescence devices.
Japanese Patent Laid-open No. 2001-290441 discloses a method of balancing the white balance by forming the pixels with different sizes. That is, the luminous area of the G emission area having the highest luminous efficiency is formed to be the smallest among the R, G, and B emission areas to obtain the white balance and long lifespan. The difference in the luminous areas can be realized by forming anode electrodes having different areas.
In addition to the above methods, a method for controlling the amount of current by differentiating voltage ranges applied to the R, G, and B pixels through the data line may be used to control the brightness.
However, the above methods do not consider the crystallization structures in the TFT of the flat panel display devices using the polycrystalline silicon. That is, the crystal grain of the TFT active layer may have various shapes and sizes according to the crystallization methods, and the current mobility can be differentiated from the shapes and sizes of the crystal grains. Then, the white balance cannot be balanced using the above methods.
Also, in the organic electroluminescence devices, when the amount of current flowing in the sub-pixels of the organic electroluminescence device exceeds the limit, the brightness per unit area increases greatly, and accordingly, the lifespan of the organic electroluminescence device is reduced. Therefore, optimal currents should be applied to the sub-pixels in order to maintain the lifespan of the device.
On the other hand, in the active matrix type organic electroluminescence display device, a panel with a high resolution is required. However, the above described TFT formed using the polycrystalline silicon having a high function causes some problems in this case.
That is, in the active matrix type flat panel display device such as the active matrix type organic electroluminescence display device, the switching TFT and the driving TFT are made of the polycrystalline silicon. Alternatively, a circuit unit TFT and a pixel unit TFT, especially the driving TFT, are fabricated using the polycrystalline silicon, thus, the driving TFT and the switching TFT, or the circuit unit TFT, have the same current mobility. Therefore, switching properties of the switching TFT, or the circuit unit TFT, and low current driving properties of the driving TFT cannot be satisfied simultaneously. That is, where the driving TFT, and the switching TFT or the circuit unit TFT of the high resolution display device are fabricated using the polycrystalline silicon having a larger current mobility, the high switching property of the switching TFT or the circuit unit TFT can be obtained. However, brightness becomes too high since a current flowing toward an electroluminescence (EL) device through the driving TFT increases, thus increasing a current density per unit area and decreasing a life time of the EL device.
On the other hand, where the switching TFT or circuit unit TFT, and the driving TFT of the display device are fabricated using the amorphous silicon having the low current mobility, the TFTs should be fabricated so that the driving TFT uses a small current and the switching TFT or the circuit unit TFT uses a large current.
To solve the above problems, methods for restricting current flowing through the driving TFT are provided, such as a method for increasing the resistance of a channel region by reducing a ratio of a length to a width of the driving TFT (W/L) and a method for increasing the resistance by forming a low doped area on the source/drain areas of the driving TFT.
However, in the method of decreasing the W/L by increasing the length, stripes are formed on the channel region and reduce an aperture area in a crystallization process in an excimer laser annealing (ELA) method. The method decreasing W/L by reducing the width is limited by a design rule of a photolithography process, and it is difficult to ensure the reliability of the TFT. Also, the method for increasing the resistance by forming the low doped area requires an additional doping process.
A method for increasing TFT properties by reducing an entire thickness of the channel region is disclosed in U.S. Pat. No. 6,337,232.
Circuits using the CMOS TFT are used to drive the active matrix liquid crystal display device, the organic electroluminescence device, and an image sensor. However, absolute values of threshold voltages of a P type TFT and an N type TFT are different in the CMOS TFT. Thus, it is not suitable for using the CMOS TFT to drive the circuit.
For example, if the threshold voltage of the N type TFT is 2V, the threshold voltage of the P type TFT is −4V. Therefore, the P type TFT having a larger absolute value of the threshold voltage is not appropriately operated by the low driving voltage. That is, the P type TFT is only operated as a passive device, such as a register. Thus, the driving voltage should be high enough to drive the P type TFT as an active device.
Especially, in a case where the gate electrode is made of a material having a work function less than 5 eV, such as the aluminum, the difference between the work functions of the gate electrode and an intrinsic silicon semiconductor is reduced as much as −0.6 eV. Consequently, the threshold voltage of the P type TFT is shifted to be a negative (−) value, and the threshold voltage of the N type TFT is nearly 0. That is, the N type TFT is likely rendered to be an on-status.
In the above circumstances, it is desirable to approximately equalize the absolute value of a threshold voltage of the N-channel TFT to that of the P-channel TFT. In the case of conventional mono-crystalline semiconductor integrated circuit technology, the threshold voltages have been controlled by using N or P type impurity doping at a very small concentration, typically, less than 1018 atoms/cm3. The threshold voltages can be controlled with an accuracy of 0.1 V or less by an impurity doping of 1015 to 1018 atoms/cm3.
However, in the case of using non-single crystalline semiconductors, even if an impurity is added at 1018 atoms/cm3 or less, the shift of the threshold voltage is hardly observed. Moreover, if the concentration of the impurity exceeds 1018, the threshold voltage rapidly varies and the conductivity becomes p-type or n-type because polycrystalline silicon generally has a lot of defects in it. Since the defect density is 1018 atoms/cm3, the added impurities are trapped by these defects and cannot be activated. Further, if the concentration of the impurity becomes larger than the defect density, the excess impurity is activated and changes the conductivity type to p-type or n-type.
In order to solve the above problems, U.S. Pat. No. 6,492,268, U.S. Pat. No. 6,124,603, and U.S. Pat. No. 5,615,935 disclose a method of fabricating a channel length of the P type TFT less than that of the N type TFT. However, according to above method, the channel lengths are varied, thus complicating the fabrication processes. The method for reducing a ratio of a length for a width of the driving TFT is disclosed in Japanese Patent Publication No. 2001-109399.